Today, companies engaged in the design and fabrication process of semiconductors have to overcome numerous challenges, having to deliver higher quality products at a reduced cost and in a shorter time span. Tremend’s experience in the semiconductor industry positions us as a key partner for any chip-making company looking to get an edge on the market.
In order to remain competitive and shorten the time-to-market, while keeping pace with the technological breakthroughs, you need an expert by your side. At Tremend, we take great pride in our long-standing partnership with top engineers working in the ASIC verification industry.
We come with a vast range of expertise in advanced engineering, emerging technologies, and agile transformation. Over the years, we’ve been working with top companies in the semiconductor industry, such as Nvidia, NXP, or Kalray. Our services include firmware design, ASIC design verification, device prototyping, functional verification, system-level verification.
Why Choose Tremend as your Design Verification Partner?
We have been delivering high-end functional verification and system-level services to high-end companies from Israel, Europe, the United States, and Canada. We have extensive experience in various procedures and techniques, including methodologies like UVM, OVM, VMM, and eRM, and verification languages such as SystemVerilog and eLanguage.
Our skilled team of ASIC verification experts can offer a multitude of verification services, delivering bug-free chips that work flawlessly. We collaborate with chip makers and hardware engineering enterprises to support device conceptualization, design and ultimately manufacturing.
Through our expertise in engineering, agile development and supply chain management, we’re enabling our partners to develop innovative products and take their chip design & manufacturing processes to the next level. At Tremend, we’re enabling top semiconductor chip makers to stay ahead of the competition and keep pace with the industry’s changes.
Tremend’s Expertise in Semiconductors
1. ASIC Design Verification
- Coverage-driven front-end design functional verification
- Planning: developing the verification plan (test plan, checkers plan, coverage plan)
- Execution: building verification environments and test suites
- Sign off: regressions running and debug, coverage analysis
- We’re using eRM and UVM methodologies
- Customization of EDA verification tools
2. Back-end Design Verification
- Synthesis - Performing synthesis, analysis and debug on multi-million gate logic design using different logic/timing/power optimization techniques
- Physical Design - Expertise in the most advanced technology process nodes up to 5nm FINFETs, executing: Floor Planning, Power Planning, Placement and optimization, Clock Tree Synthesis (CTS), Routing and optimization
- Physical Verification - Layouts are carefully checked with the industry standard tools, including parasitic extraction to confirm on spec operation before first silicon. Checks include DRC, LVS, ERC and customer specific checks
- Static Timing Analysis (STA) & closure - Post Layout Extraction Timing Analysis for multi modes & multi corners, Timing ECOs using TSO or manual for timing critical paths
- Power Analysis - EMIR analysis (static and dynamic): Power Integrity (Power EM and IR-Drop) and Signal Integrity (Sig EM, IR-Drop and Noise)
3. Firmware Development
- Board Support Packages
- Expertise in Linux, Android, RTOS and low cost microcontroller devices
- Connectivity solutions with multiple protocols including WiFi, Bluetooth LE / mesh and Zigbee
- Device security, secure manufacturing and over-the-air update systems
- Pre- and Post-silicon firmware validation
4. Development Tools
- Toolchain development and maintenance
- Compiler backend and debugger ports for new silicon
- Eclipse-based tool development
- Functional Safety qualification of tools ( ISO26262 )
- Optimization of software libraries for new architectures
1. SystemVerilog UVM Based Verification
- Accelerated test bench development using automation tools
- IP verification
- Using best practices in verification coding
2. Verification Planning
- Stimulus generation
- Feature extraction
- Error scenarios
3. Verification Management
- Test case mapping
- Coverage closure & tracking
- SoC and IP level verification expertise
- Gate level simulation
- Consumer technology I/O Buses
- Data transmission
- Computational offloading
- AI accelerators
5. System-Level Verification
- Simulation and hardware emulation
- Developing automation tools
- Creating debug-effort decreasing tools
- Randomizing user cases
- Elevating coverage definitions from block level to system level
6. Design Services
- IP micro architecture
- Timing & DFT
- RTL design
- Low power checks
7. ASIC Verification
- Test bench development
- Performance tests
- Power awareness
- Formal verification
Key Software Delivery Principles
- Frequent fully functional releases.
- Automated end-to-end release processes, testing and multi-staged delivery.
- Version control policies.
- Code reviews and pull requests.
- Well established Definition of Done & Ready for user story, epic, sprint.
Tools we use
- Atlassian suite (Jira, BitBucket, Confluence) for task management, documentation and source control.
- TestRail for test case management.
- Jenkins - for automating processes and CI/CD pipelines.
- Video & audio calling, Slack, Skype - for communication.
- Jira & Intervals for time tracking.
- Internal own written tool bridging processes between all of the above.